发明名称 CHIP SCALE PACKAGE AND MANUFACTURING METHOD THEREOF
摘要 <p>PURPOSE: A chip scale package is provided to improve a bonding reliability by connecting a bonding pad of a semiconductor chip with a circuit pattern of a circuit layer. CONSTITUTION: A chip scale package comprises a chip(1) having bonding pads(2), a circuit layer formed with windows on the positions of the bonding pads(2), interconnection metals(9a) filled into the windows for electrically connecting the bonding pads(2) as the outer connecting pads of the chip(1) with the circuit pattern of the circuit layer, thereby improving a bonding reliability, an EMC(Epoxy Molding Compound)(7) covering both sides of the chip(1) and leads, and solder balls(8) sticking to the opposite side of the chip fixed surface of the circuit layer.</p>
申请公布号 KR20020046774(A) 申请公布日期 2002.06.21
申请号 KR20000077105 申请日期 2000.12.15
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, JIN GWAN
分类号 H01L23/48;H01L23/488;(IPC1-7):H01L23/488 主分类号 H01L23/48
代理机构 代理人
主权项
地址