发明名称 |
DOUBLE FOLDING VITERBI DECODER |
摘要 |
PURPOSE: A double folding Viterbi decoder is provided to save the electric power by reducing a size of an ACS circuit and a size of a PM cell and simplifying a state transition degree. CONSTITUTION: A size of an ACS(Add Compare Select) circuit is reduced by forming the ACS circuit with three adders/subtracters and three increment/decrement portions. An EPRML trellis of a folding Viterbi detector is divided into two trellises of butterfly shape. The first ACS circuit is used for calculating a probable distance of the trellis of a state of 111/000, 100/011 to a state of 111/000, 110/001. The first ACS circuit is formed with two adder/subtracters and two increment/decrement portions. The second ACS circuit is used for calculating the probable distance of the trellis of a state of 111/001, 101/010 to a state of 100/011, 101/010. The second ACS circuit is formed with two adder/subtracters and two increment/decrement portions.
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申请公布号 |
KR20020045649(A) |
申请公布日期 |
2002.06.20 |
申请号 |
KR20000074908 |
申请日期 |
2000.12.09 |
申请人 |
KOREA CHUNGANG EDUCATIONAL FOUNDATION |
发明人 |
AHN, HYEON JU;KI, HUN JAE;KIM, SU WON |
分类号 |
H03M13/41;(IPC1-7):H03M13/41 |
主分类号 |
H03M13/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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