发明名称 Circuit simulation method and system
摘要 A circuit simulation method and system are provided, which can execute a highly precise delay analysis by generating a wiring structure which includes a target wiring conductor and a circumjacent wiring conductor in the circumferences of the target wiring conductor and which is generated in consideration of variation conditions, and by calculating a wiring capacitance on the basis of the wiring structure, thereby to highly precisely extracting a wiring capacitance in consideration of variation in fabricating process. The circuit simulation system includes a layout information storing device 11, a wiring variation information storing device 12 for storing information of variations in wiring conductors, a process information storing device 13, a device 14 for extracting wiring resistance and wiring capacitance obtained in consideration of variation, by calculating wiring resistance and wiring capacitance obtained in consideration of variation, and by generating circuit connection information derived by modifying the circuit connection information in view of the wiring resistance and the wiring capacitance thus obtained, so that a delay simulation is executed in consideration of highly precise wiring capacitance.
申请公布号 US2002077798(A1) 申请公布日期 2002.06.20
申请号 US20010810124 申请日期 2001.03.16
申请人 NEC CORPORATION 发明人 INOUE SEIICHI;FUJITA YOKO
分类号 H01L21/82;G06F17/50;(IPC1-7):G06F17/50 主分类号 H01L21/82
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