| 发明名称 |
MOTION COMPENSATED DE-INTERLACING IN VIDEO SIGNAL PROCESSING |
| 摘要 |
A processing circuit for motion compensated de-interlacing of video signals, the processing circuit comprising: a line memory (21), a de-interlacing circuit (22), a frame memory (24), and a cache memory (25), in which a pixel mixer (29) is interposed between the cache memory (25) and the de-interlacing circuit (22).
|
| 申请公布号 |
WO0249345(A1) |
申请公布日期 |
2002.06.20 |
| 申请号 |
WO2001EP13825 |
申请日期 |
2001.11.26 |
| 申请人 |
KONINKLIJKE PHILIPS ELECTRONICS N.V. |
发明人 |
OJO, OLUKAYODE, A.;KETTENIS, JEROEN, M. |
| 分类号 |
H04N7/01;H04N5/44;(IPC1-7):H04N5/44 |
主分类号 |
H04N7/01 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
|
| 地址 |
|
