Energy robust field effect transistor

摘要

A field effect transistor (30) has an array of transistors (31) made up of bonding pads (45-47) and sub-arrays of transistors (41-43). The bonding pads (45-47) are distributed between the sub-arrays of transistors (41-43) to reduce the maximum temperature that any portion of the FET (30) is exposed to while the FET (30) is in a conducting state. A similar effect can be appreciated by adjusting the threshold voltage or pinch-off resistance of the transistors in a portion (101) of an array of transistors (95) or by providing transistors with a higher thermal breakdown in the center of the field effect transistor (30).