发明名称 Stacked flip chip assemblies
摘要 A stacked flip chip assembly that substantially enhances integrated circuit density and reliability in a multi chip module by electrically coupling a first die to a conductive surface of a substrate through a flip chip attachment. The assembly further includes electrically coupling a second die to the first die through the flip chip attachment such that the second die is disposed on the first die and across from the substrate. The assembly also includes a third die electrically coupled to the second die through the flip chip attachment such that the third die is disposed on the second die and across from the second die and the substrate. Further, the second and third dies are electrically coupled to the substrate through the first and second dies by having conductive redistribution traces on sides of the first and second dies to route electrical signals from the second and third dies to the substrate and vice versa.
申请公布号 US2002074637(A1) 申请公布日期 2002.06.20
申请号 US20000741370 申请日期 2000.12.19
申请人 INTEL CORPORATION 发明人 MCFARLAND JONATHAN
分类号 H01L21/56;H01L23/31;H01L23/48;H01L23/498;H01L23/525;H01L25/065;(IPC1-7):H01L21/44;H01L21/48;H01L29/40;H01L23/34;H01L23/52;H01L21/50 主分类号 H01L21/56
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