发明名称 APPARATUS FOR INTERFACING DATA CLOCK AND FRAME SYNCHRONOUS PULSE IN LOCAL DATA LINK CIRCUIT PACK WITHIN MOBILE COMMUNICATION EXCHANGE
摘要 PURPOSE: An apparatus for interfacing a data clock and a frame synchronous pulse in a local data link circuit pack within a mobile communication exchange is provided to interface the data clock and the frame synchronous pulse between an even link and an odd link by installing a clock selector and a frame synchronizer within a control portion. CONSTITUTION: An odd optical interface portion(110) is used for transmitting and receiving optical data of an STM-1 level of 155.520Mbps. An even optical interface portion(120) is used for transmitting and receiving optical data of an STM-1 level of 155.520Mbps. A PCM/IPC data transmission/reception memory portion(130) is used for transmitting and receiving PCM/IPC data between the odd and the even interface portions(110,120) and a time switch(200). A phase locked loop(140) generates a clock of 16.38Mhz synchronized with a clock of 19.44Mhz extracted from the even optical interface portion(120). A control portion(150) generates a data clock and control a data transmission operation and a data reception operation. A data clock/frame synchronization interface portion(170) is used for interfacing the data clock and a frame synchronous signal between the control portion(150) and other side boards. A data interface portion(180) transmits the data clock and the frame synchronous signal to the time switch(200).
申请公布号 KR20020044937(A) 申请公布日期 2002.06.19
申请号 KR20000074207 申请日期 2000.12.07
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE, GYU HO
分类号 H04L7/00;(IPC1-7):H04L7/00 主分类号 H04L7/00
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