| 摘要 |
PURPOSE: A chip scale package and a method for fabricating a chip scale package under a wafer level are provided to improve productivity by fabricating the chip scale package under the wafer level. CONSTITUTION: A center pad type chip(1) is adhered to one side of a heat-sink(10). An LOC(Lead On Chip) tape(6) is adhered to both sides of a center pad(1a) of the center pad type chip(1). A lead(5) is adhered to an upper face of the LOC tape(6). The lead(5) has a down-set structure. The center pad(1a) of the center pad type chip(1) is connected electrically with the lead(5) by a wire. A mold body is used for sealing the lead(5), the wire, and the upper face of the chip(1). A non-conductive thermal bonding tape(11) is inserted between the heat-sink(10) and a back face of the center pad type chip(1). The heat-sink(10) is formed by a metal material such as a cooper.
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