发明名称 Tuner for digital receiver with multiple input and multiple output channels
摘要 <p>The present invention teaches a compact and highly integrated multiple-channel digital tuner and receiver architecture, suitable for widespread field deployment, wherein each receiver demodulator channel may be remotely, automatically, dynamically, and economically configured for a particular cable, carrier frequency, and signaling baud-rate, from an option universe that includes a plurality of input cables, a plurality of carrier frequencies, and a plurality of available baud-rates. A multiple coax input, multiple channel output, digital tuner is partitioned into a multiple coax input digitizer portion (900) and a multiple channel output front-end portion (6000). The digitizer portion consists of N digitizers and accepts input signals from N coax cables (1800-1...1800-N) and digitizes them with respective A/D converters (930-1...930-N). The front-end portion (6000) consists of M front-ends and provides M channel outputs suitable for subsequent processing by M respective digital demodulators. In a first clock domain (1100), a fixed predetermined A/D sampling rate is chosen to provide oversampling of the inputs by a common integer multiple of all the symbol rates of interest. A plurality of other clock domains (1200,1300-1) operate at selectable sub-multiples of the first domain (1100) as required to deliver a constant number of symbol samples at the output of each front-end. At the input to each of the M front-ends is a respective input selector (2000-1...2000-M) coupled to each of the N streams of digitized input data followed by a digital signal scaler (3000-1...3000-M) that dynamically scales the selected incoming stream of digitized input data as a function of the signal power of the channel's associated carrier.</p>
申请公布号 EP1215813(A1) 申请公布日期 2002.06.19
申请号 EP20000403506 申请日期 2000.12.13
申请人 JUNIPER NETWORKS, INC. 发明人 BUDA FABIAN
分类号 H04N5/50;H03D3/00;H04N5/44;H04N7/173;(IPC1-7):H03D3/00 主分类号 H04N5/50
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