METHOD FOR FABRICATING HIGH-CURRENT POWER INTEGRATED CIRCUIT HAVING LATERAL TRENCH GATE DMOS POWER DEVICE

摘要

PURPOSE: A method for fabricating a high-current power integrated circuit is provided to decrease the size of a high-current integrated circuit(IC) chip, by integrating a high-current trench gate DMOS power device and high-voltage lateral double diffused MOS(LDMOS) and complementary MOS(CMOS) devices in an n-type epitaxial layer on a p-type silicon substrate. CONSTITUTION: A thick thermal oxide layer is grown on the p-type silicon substrate(1) and a photolithography process is performed regarding the thermal oxide layer to define an n-type buried layer(2). The density of the n-type buried layer is controlled according to a breakdown voltage. Phosphorous ions are implanted into the n-type buried layer and are diffused in an oxidation atmosphere so that a phosphorous-doped n-type epitaxial layer is grown. An n-well and a p-well are formed, wherein a high temperature heat treatment process is performed to make the junction of the n-type buried layer out-diffused to a lower portion of a gate electrode. A trench device is isolated. A p-body junction is formed as a channel region of a trench gate DMOS. A field oxide layer region is defined and a field threshold voltage is controlled. An oxide layer is grown. A gate oxide layer of the high-voltage LDMOS and CMOS devices is grown, and a threshold voltage is controlled to form the gate electrode. An LDD junction is formed and a sidewall oxide layer(17) is formed. The source and drain of the CMOS and LDMOS trench gate DMOS devices are joined and a metal interconnection is formed.