| 摘要 |
PROBLEM TO BE SOLVED: To provide a phase comparing circuit which prevents generation of waveform deterioration in a recognition data output in the case of high speed operation, because many blocks except output terminals are connected with D-FFs connected with the output terminals used for the recognition data output, and deterioration of a band is caused by capacitive load of the blocks. SOLUTION: This phase comparing circuit consists of a pair of input stage D-FFs 8, 9 wherein an input terminal 1 in which an input data signal is inputted is connected with a data input terminal D, and a clock signal whose phase is inverted is inputted in a clock input terminal C, a pair of output stage D-FFs 10, 11 wherein an output data signal of the D-FF 9 is inputted in the data input terminal D, and output data of the D-FF 8 are subjected to phase inversion mutually and inputted in the clock terminal C, and an adder 13 whose inputs are both outputs of the output stages D-FFs 10, 11.
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