发明名称 MANUFACTURE OF DUAL BIT MULTI-LEVEL BALLISTIC MONOS MEMORY, PROGRAMMING, AND OPERATION PROCESS
摘要 PROBLEM TO BE SOLVED: To provide a flash memory of fast low-voltage ballistic program, ultra-short channel, ultra-high integration level, and dual bit multi-level. SOLUTION: A cell structure is realized by (i) providing a side wall control gate on the laminated film of oxide film, nitride film, oxide film (ONO) on both sides of a ward gate, and (ii) forming a control gate and a bit impurity film by self-alignment so that the control gate and the bit impurity film are shared between adjoining memory cells due to high integration. The process comprises, as main components, 1) a process for manufacturing a removable side wall for manufacturing the ultra-short channel and the side wall control gate with or without a step structure, and 2) the formation of the control gate, by self-alignment, on a storage nitride film and the impurity film.
申请公布号 JP2002170891(A) 申请公布日期 2002.06.14
申请号 JP20000354722 申请日期 2000.11.21
申请人 HALO LSI DESIGN & DEVICE TECHNOL INC;NEW HEIRO:KK 发明人 OGURA SEIKI;OGURA TOMOKO;HAYASHI YUTAKA
分类号 H01L21/8247;H01L21/28;H01L21/8246;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 H01L21/8247
代理机构 代理人
主权项
地址