发明名称 DIFFERENTIAL BIPOLAR STRAY-INSENSITIVE PIPELINED DIGITAL-TO-ANALOG CONVERTER
摘要 A pipelined digital-to-analog converter "DAC" converts a digital input to an analog output. The pipelined DAC has a plurality of stages. A first of the plurality of stages is coupled to an initialization capacitor and ground. Each of the remainder of the plurality of stages is coupled to a respective previous stage. The capacitor (54) has first and second plates. The capacitor receives a charge at the first plate in accordance with an associated bit of the digital input. The first switch (56) coupled the first plate of the capacitor to ground when the capacitor is not receiving the charge. The second switch (58) couples the second plate of the capacitor to ground when the capacitor is receiving the charge. Coupling the capacitor to ground reduces the effect of stray capacitance in the pipelined DAC, improving its performance.
申请公布号 WO0247274(A1) 申请公布日期 2002.06.13
申请号 WO2001US46670 申请日期 2001.12.04
申请人 CATENA NETWORKS, INC. 发明人 MOUSSAVI, MOHSEN
分类号 H03M1/06;H03M1/72;(IPC1-7):H03M1/38;H03M1/12 主分类号 H03M1/06
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