| 摘要 |
<p>A method for implementing a self-aligned low silicide gate (36) is archived by confining a low temperature silicidation metal (32) within a recess (28) overlying a channel and annealing to cause the low temperature silicidation metal (32) and its overlying silicon (34) to interact to form the self-aligned low temperature metal silicide gate (36). A planarization step is performed to remove the remaining unreacted silicon (34) by chemical mechanical polishing until no silicon (34) is detected. In order embodiments, the silicon (132) is deposited in the recess (28), followed by deposition of the silicidation metal (132) and annealing to form the metal silicide gate (136).</p> |
