发明名称 |
Circuit configuration and method for synchronization |
摘要 |
A circuit configuration and a method for the synchronization of signals include transmitting signals in parallel through data lines and buffer-storing the signals in a synchronizing unit. A clock signal is determined from the signals of a data line and is used for synchronizing the outputting of the signals. The signals are output in the order in which the signals were read. The signals are likewise output through a plurality of data lines, the signals being output temporally synchronously. Propagation time differences are compensated due to the buffer-storage. Moreover, the clock signal is determined from the signals themselves. Consequently, the use of an additional clock signal is not necessary.
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申请公布号 |
US2002071335(A1) |
申请公布日期 |
2002.06.13 |
申请号 |
US20010998725 |
申请日期 |
2001.11.30 |
申请人 |
BENZINGER HERBERT;WIRTH NORBERT;SCHNEIDER RALF |
发明人 |
BENZINGER HERBERT;WIRTH NORBERT;SCHNEIDER RALF |
分类号 |
G11C7/10;G11C7/22;(IPC1-7):G11C8/18 |
主分类号 |
G11C7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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