发明名称 BINARY SQUARER WITH SHIFTER AND SELECTABLE ADDER
摘要 <p>The circuit (10) for squaring a number (Z), comprises a shifter (12) for generating shifted versions of Z. Each shifted version of Z is accumulated into a results register only if a bit of Z corresponding to that particular shifted version of Z is set to one.</p>
申请公布号 WO2002046911(A1) 申请公布日期 2002.06.13
申请号 GB2001005278 申请日期 2001.11.29
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