发明名称 Method of manufacturing of a semiconductor package integral with semiconductor chip.
摘要 A semiconductor chip (10) having a semiconductor substrate (11), a plurality of pads (12) formed above the semiconductor substrate a first passivating film (13) formed over an entire surface of the semiconductor substrate, and having openings (14) above the pads the surface of the first passivating film being flat, a plurality of interconnection lines (15) formed on the surface of the first passivating film (13), a second passivating film (16) formed over the entire surface of the first passivating film (13) and having through holes (17), the through holes being arranged in the form of an array, the surface of the second passivating film being flat, a plurality of contacts (19) for connection to external leads each of the contacts being formed within and above a respective one of the through holes (17), the contacts being arranged in the form of an array. <IMAGE>
申请公布号 EP0706208(B1) 申请公布日期 2002.06.12
申请号 EP19950115550 申请日期 1995.10.02
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 IWASAKI, HIROSHI;AOKI, HIDEO
分类号 H01L21/60;H01L23/31;H01L23/485;H01L23/525;H01L23/528 主分类号 H01L21/60
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