发明名称 PLATING METHOD, PLATING SOLUTION, SEMI-CONDUCTOR DEVICE, AND MANUFACTURING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To prevent voids or seams from being generated in grooves or holes in a copper plating process in a semi-conductor. SOLUTION: In the process for depositing a film on a substrate having grooves of the height h and the width w or holes of the radium w, two kinds of additives 1 and 2 in which the ratio D/κof the diffusion factor D [m2/sec] of the additives to impair the film deposition to the reaction speedκ[m/s] of adsorption or consumption on the surface satisfies the formulae below are used under the condition that the ratio of (the film deposition speed with additive) to (the film deposition speed without additive) at the same plating electric potential is >=0.01 and <=0.7. Additive 1:0.05×h12/w1<D1/κ1<0.5×h12/w1; and additive 2:0.05×h22/w2<D2/κ2<0.5×h22/w2, where h1 is the height of the grooves or holes with h/w being minimum, h2 is the height of the grooves or holes with h/w being maximum, and w2 is the radius.
申请公布号 JP2002167689(A) 申请公布日期 2002.06.11
申请号 JP20000361192 申请日期 2000.11.28
申请人 HITACHI LTD 发明人 KOBAYASHI KINYA;SANO AKIHIRO;ITABASHI TAKESHI;HASHIBA TOSHIO
分类号 C25D3/38;C25D7/00;(IPC1-7):C25D7/00 主分类号 C25D3/38
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