发明名称 Method of selectively forming a silicide layer on a logic area of a semiconductor substrate
摘要 The present invention provides a method of selectively forming a silicide layer on a logic region of a semiconductor substrate which has an integration of a memory cell region and the logic region. The method comprises the steps of: forming an insulation film over the memory cell region and the logic region; entirely applying a resist film over the insulation film; selectively removing the resist film over at least a predetermined part of the logic region by use of a lithography process, whereby the insulation film is shown over the logic region; selectively etching the insulation film over the logic region by use of the resist film, whereby at least a silicon region is shown over the logic region; removing the resist film; entirely depositing a refractory metal layer on the insulation film over the memory cell region and also on the silicon region over the logic region; carrying out a heat treatment to cause a silicidation reaction to form at least a silicide layer on the silicon region over the logic region; and removing an unreacted refractory metal layer from the silicon oxide film.
申请公布号 US6403404(B1) 申请公布日期 2002.06.11
申请号 US20000547229 申请日期 2000.04.11
申请人 NEC CORPORATION 发明人 HAMADA MASAYUKI
分类号 H01L21/8234;H01L21/28;H01L21/8238;H01L21/8242;H01L27/088;H01L27/108;H01L29/49;(IPC1-7):H01L21/335;H01L21/823 主分类号 H01L21/8234
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