| 摘要 |
A method for encoding a binary input sequence x(0,1) to obtain a duobinary output sequence y(+1,0,-1) is provided. The duobinary coding technique alway s provides an output bit yk =0 when the corresponding bit xk =0; bits yk alternatively assume a logical level "+1" and "-1" whenever an input bit xk- 1=0 changes to xk=1, and the output bit yk maintains the logical level "+1" or "-1" whenever the corresponding bit xk maintains the logical level "1". A coding device for encoding a binary input sequence x(0,1) to a duobinary output sequence y(+1,0,-1) is also provided, comprising a D-type flip-flop f or generating a binary switch signal. A first AND circuit receives the input sequence and the switch signal, and provides a first binary sequence a(0,1), while a second AND circuit receives the input sequence and the complement of the switch signal and provides a second binary sequence b(0,1). These first and second binary sequences are applied to a summer to obtain the output sequence y(+1,0,-1). A method for differentially driving an M-Z modulator using a virtual ground level is also provided, which reduces the peak-to-pea k drive voltage by a factor of two.
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