| 摘要 |
The method of dividing the frequency of electronic signal X0 includes: preloading a first predetermined value P(1:N) in an up/down counter L1 . . . LN, clocking the up/down counter L1 . . . LN by means of said electronic signal X0, detecting a state in which the up/down counter has a second predetermined value, and again preloading the first predetermined value P(1:N) in the up/down counter L1 . . . LN. The preloading operations are performed asynchronously. There is a reduction of the noise introduced in the power supply voltage of a frequency divider DIV by the periodical preloading operations of the up/down counter L1 . . . LN of this divider.
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