发明名称 |
Semiconductor device having gate-gate, drain-drain, and drain-gate connecting layers and method of fabricating the same |
摘要 |
A semiconductor device comprising a peripheral circuit portion and a memory cell portion including a plurality of memory cells. Each memory cell has first and second gate-gate connecting layers, first and second drain-drain connecting layers, and first and second drain-gate connecting layers. The first and second gate-gate connecting layers respectively connect the gates of driver transistors to the gates of load transistors. The first and second drain-drain connecting layers are formed over a first interlayer dielectric and respectively connect the drains of driver transistors to the drains of load transistors. The first and second drain-gate connecting layers are formed over a second interlayer dielectric and respectively connect the first drain-drain connecting layer to the second gate-gate connecting layer and the second drain-drain connecting layer to the first gate-gate connecting layer.
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申请公布号 |
US6404023(B1) |
申请公布日期 |
2002.06.11 |
申请号 |
US20010758388 |
申请日期 |
2001.01.12 |
申请人 |
SEIKO EPSON CORPORATION |
发明人 |
MORI KATSUMI;KAWAHARA KEI;KASUYA YOSHIKAZU |
分类号 |
H01L21/768;H01L21/822;H01L21/8244;H01L27/04;H01L27/10;H01L27/11;H01L29/76;(IPC1-7):H01L29/76 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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