发明名称 |
A 0-100% DUTY CYCLE, TRANSFORMER ISOLATED FET DRIVER |
摘要 |
A transformer isolates a control circuit from a FET, the control circuit including a clock generator for providing, when en- abled, a clock signal to the transformer primary. A PWM input selectively disables the clock generator from providing the clock signal to the transformer primary. The transformer secondary is connected in a full wave centertap configuration for providing a full wave rectified version of the clock signal, the full wave rectified version being a relatively constant DC voltage signal suppli- ed at one level to the FET to turn on the FET when the clock generator is enabled to provide the clock signal to the primary. The centertap configuration provides a relatively constant DC voltage signal at a second level to the FET to turn off the FET when the clock generator is disabled by the PWM input from providing the clock signal to the primary.
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申请公布号 |
CA2110794(C) |
申请公布日期 |
2002.06.11 |
申请号 |
CA19922110794 |
申请日期 |
1992.06.19 |
申请人 |
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发明人 |
SALERNO, DAVID C.;ROBERTS, WALTER O. |
分类号 |
H02M1/08;H03K17/61;H03K17/687;H03K17/691;(IPC1-7):H03K19/017 |
主分类号 |
H02M1/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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