发明名称 Copper alloy interconnections for integrated circuits and methods of making same
摘要 Formation of copper alloy interconnected lines on integrated circuits includes electroplating copper onto a seed layer wherein the concentration of the doping element or elements in the copper is controlled such that the core portion of the copper interconnect line has a low concentration of the doping element or elements, while surface portions of the copper interconnect line have higher concentrations of the doping element or elements. Copper alloys are plated at different current densities to provide doping element rich interfaces. In this way, electromigration resistance can be improved by having relatively higher doping concentrations at surface portions of an interconnect line while the desired low electrical resistivity of the interconnect is maintained by keeping the interior portions of the interconnect with a substantially lower doping concentration.
申请公布号 AU3976702(A) 申请公布日期 2002.06.11
申请号 AU20020039767 申请日期 2001.10.29
申请人 INTEL CORPORATION 发明人 CHRISTOPHER D. THOMAS;VALERY M. DUBIN
分类号 H01L21/288;H01L21/768;H01L23/532 主分类号 H01L21/288
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