发明名称 Method and apparatus for generating memory addresses for testing memory devices
摘要 A counter internal to a memory device for generating memory addresses in physical or logical sequence in non-redundant or redundant memory space, counting up or down in increments of the user's choice. The counter may be advantageously used to generate memory addresses for functional testing of the memory cells within the memory device.
申请公布号 US2002067646(A1) 申请公布日期 2002.06.06
申请号 US20010039785 申请日期 2001.10.26
申请人 FISTER WALLACE E. 发明人 FISTER WALLACE E.
分类号 G11C8/02;G11C29/18;(IPC1-7):G11C29/00 主分类号 G11C8/02
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