发明名称 Synchronous memory modules and memory systems with selectable clock termination
摘要 The invention encompasses memory systems and/or memory modules which allow selectable clock termination between the clock/clock buffer and components of the memory modules. The invention provides a fully forward and backward compatible memory solution. The invention provides the memory modules themselves, the FET switches designed for use on the modules, and the systems that include enable/disable pins to use these modules. This invention will permit memory modules to be developed that can operate in existing (emerging) memory subsystems, as well as meet the low power/low pin count needs of future memory subsystems with no required changes to the existing/emerging systems. For 184 Pin Registered DIMMs, the power savings will equate to greater than 200 mw/DIMM, and systems will be permitted to connect DIMM clocks in serial, similar to address/control lines, thereby increasing the address/control window as well as the system read loop-back timings.
申请公布号 US2002067654(A1) 申请公布日期 2002.06.06
申请号 US20000729013 申请日期 2000.12.04
申请人 GRUNDON STEVEN;KELLOGG MARK 发明人 GRUNDON STEVEN;KELLOGG MARK
分类号 G11C11/407;G06F1/04;G06F12/00;G06F13/16;G11C5/00;G11C7/10;G11C7/22;G11C8/00;G11C11/401;G11C11/4076;(IPC1-7):G11C8/00 主分类号 G11C11/407
代理机构 代理人
主权项
地址