| 摘要 |
The frequency offset correction method uses an integrated frequency offset compensation circuit, for providing a voltage which compensates the difference between the output frequency (FO) of the controlled oscillator (CO) of the phase-locked loop circuit and a required frequency (FCL), by comparing the output signal (USF) of the loop filter (SF) at the output of the phase detector (PD) with a reference voltage (UREF). A control stage (ST) supplies a compensation signal (UF) to the controlled oscillator in dependence on the difference between the compared signals. An Independent claim for a phase-locked loop circuit is also included.
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