发明名称 Efficient packet processing pipelining device and method
摘要 A packet processing apparatus (10) for processing data packets for use in a packet switched network includes means for receiving a packet, means for adding administrative information to a first data portion of the packet, the administrative information includes at least an indication of at least one process to be applied to the first data portion, and a plurality of parallel pipelines, each pipeline comprising at least one processing unit (4), wherein the processing unit carries out the process on the first data portion indicated by the administrative information to provide a modified first data portion. According to a method, the tasks performed by each processing unit are organized into a plurality of functions such that there are substantially only function calls and no interfunction calls and that at the termination of each function called by the function call for one processing unit, the only context is a first data portion.
申请公布号 GB0209670(D0) 申请公布日期 2002.06.05
申请号 GB20020009670 申请日期 2002.04.26
申请人 EASICS NV 发明人
分类号 H04L12/56 主分类号 H04L12/56
代理机构 代理人
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