发明名称 I/O pad voltage protection circuit and method
摘要 An I/O pad voltage protection circuit and method tracks a bias voltage of cascaded stages in order to avoid overvoltage stress in I/O transistors. An overshoot protection circuit controls overshoot current sinking to provide a clamp voltage equal to an I/O pad supply voltage, or other suitable reference voltage, during overshoot conditions, as a function of a reference voltage generated by a reference voltage generating circuit. An undershoot protection circuit includes a reference voltage generating circuit and controls undershoot current sinking to provide a clamp voltage approximately equal to an I/O pad ground voltage, or other suitable reference voltage, during undershoot conditions as a function of a reference voltage generated by the second reference voltage generating circuit.
申请公布号 US6400546(B1) 申请公布日期 2002.06.04
申请号 US19990388988 申请日期 1999.09.02
申请人 ATI INTERNATIONAL SRL 发明人 DRAPKIN OLEG;TEMKINE GRIGORI
分类号 H03K19/003;(IPC1-7):H02H3/22 主分类号 H03K19/003
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