| 摘要 |
A programmable logic device can be programmed to configure its logic elements to approximate the normalization of probability values used in the operation of logMAP decoders, thereby significantly reducing the amount of logic resources required in the normalization procedure without significantly degrading performance. In the first preferred embodiment, normalization is achieved by approximating the normalization value by calculating an approximate normalization value which is then deducted from all alpha values in the trellis at any time. This is done by logically ANDing all alpha input probability values with the NOT of their own MSBs. The resulting outputs are then all bitwise ORed together, the output of which is the approximate normalization value. In another embodiment, the approximate normalization value is calculated using a fixed constant determinable at the outset of the logMAP decoder operation.
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