Method of fabricating a bipolar transistor with ultra small polysilicon emitter

摘要

A method of fabricating a small bipolar transistor emitter in an integrated circuit structure is provided. The integrated circuit structure includes a trench isolation structure formed in a semiconductor substrate to define a substrate active device region. A collector region having a first conductivity type is formed in the substrate active device region beneath a surface thereof. A base region having a second conductivity type opposite the first conductivity type is formed in the substrate active device region above the collector region and extending to the surface of the substrate active device region such that the surface of the active device region forms a surface of the base region. A layer of dielectric material is formed to extend at least partially over the surface of the base region to define an edge of the layer of dielectric material that is formed over the surface of the base region. A layer of doped polysilicon is then formed over the surface of the layer of dielectric material and extending over the edge of the layer of dielectric material and over the surface of the base region. A chemical mechanical polishing step is then performed to planerize the layer of doped polysilicon. The layer of doped polysilicon is then patterned to define a polysilicon emitter region that extends over the edge of the layer of dielectric material to provide a polysilicon emitter contact on the surface of the base region. The polysilicon emitter region is then heated such that dopant contained in the polysilicon emitter region diffuses from the polysilicon emitter contact through the surface of the base region to define an emitter junction region at the surface of the base region beneath the polysilicon emitter contact. Dielectric sidewall spacers are then formed on the sidewalls of the polysilicon emitter region to electrically isolate the polysilicon emitter.