发明名称 |
Circuit configuration having a variable number of data outputs and device for reading out data from the circuit configuration with the variable number of data outputs |
摘要 |
A circuit configuration is described which provides the advantage that data can be read out of a serially readable data memory via a freely selectable number of existing data outputs. This is advantageously achieved in that the serial data are routed with a delay effected by memory/delay circuits to a plurality of data outputs.
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申请公布号 |
US6400630(B2) |
申请公布日期 |
2002.06.04 |
申请号 |
US20010766321 |
申请日期 |
2001.01.19 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
KRAUSE GUNNAR |
分类号 |
G11C19/00;G06F1/00;G11C7/10;G11C7/22;G11C19/28;(IPC1-7):G11C7/00 |
主分类号 |
G11C19/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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