发明名称 Technique for increasing endurance of integrated circuit memory
摘要 A method increases endurance of an array of memory cells which have an endurance specified according to the number of change cycles that the memory cell can endure within a performance tolerance. The method is based on arranging the array into a plurality of sectors, and assigning a subset of addresses for storage of data structure expected to change a number of times that is sufficient to exceed the specified endurance of the memory cell in the array. A record is maintained indicating one of the plurality of sectors as a current sector, directing accesses using the subset of addresses to the current sector, counting changes executed to memory cells identified by the subset of addresses for the current sector, and changing the current sector to another one of the plurality of sectors when the count of changes exceeds the threshold.
申请公布号 US6400634(B1) 申请公布日期 2002.06.04
申请号 US19990029952 申请日期 1999.06.18
申请人 MACRONIX INTERNATIONAL CO., LTD. 发明人 LIOU KONG-MOU;HU TING-CHUNG;WAN RAY-LIN;SHONE FUCHIA
分类号 G11C16/08;(IPC1-7):G11C8/00 主分类号 G11C16/08
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