| 摘要 |
A memory decoder system is disclosed. In an exemplary embodiment of the invention, the system includes a matrix of memory cells, arranged into rows and columns, with a plurality of wordline drivers corresponding to each row in the matrix. A group of wordline driver-decoder blocks each contains a subset of the plurality of wordline drivers therein, with each of the wordline driver-decoder blocks being separated by a row control block. The row control block includes control circuitry for the wordline drivers. For any given wordline driver-decoder block, a first group of wordline drivers contained therein is controlled by a row control block located on one side of the given wordline driver-decoder block, while a second group of wordline drivers contained therein is controlled by a row control block located on an opposite side of the given wordline driver-decoder block.
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