发明名称 METHOD FOR DISTRIBUTING CLOCKS OF TIME DIVISION SWITCH
摘要 PURPOSE: A method for distributing clocks of a time division switch is provided to synchronize a clock of a 2K side with a frame pulse by combining a self link alarm with the other side alarm. CONSTITUTION: A time division switching board and a control memory/maintenance combination board receive various clocks such as CP3, CP3D, FP3, and CLKF from a link interface board and selects a receiving clock according to a state of the CLKF signal. The CLKF signal becomes low if a self link of the link interface board is normal. The CLKF signal becomes high if the self link of the link interface board is abnormal. A signal formed by combining two alarms is outputted to the time division switching board and the control memory/maintenance combination board. Both sides of A and B receive self-generated clocks when both sides are abnormal.
申请公布号 KR20020040027(A) 申请公布日期 2002.05.30
申请号 KR20000069936 申请日期 2000.11.23
申请人 LG ELECTRONICS INC. 发明人 YOO, SEONG HWAN
分类号 H04L7/00;(IPC1-7):H04L7/00 主分类号 H04L7/00
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