发明名称 Gated counter analog-to-digital converter with error correction
摘要 A superconducting A/D converter (10) has an error correction system (70) for eliminating non-linearities in a primary quantizer (30). The converter (10) includes a primary quantizer (30), a primary SFQ counter (50), and the error correction system (70). The primary quantizer (30) generates primary SFQ pulses based on an average voltage of an analog input signal. The primary SFQ counter (50) converts the primary SFQ pulses into a digital output signal based on a frequency of the primary SFQ pulses. The error correction system (70) corrects the digital output signal based on the analog input signal and the primary SFQ pulses. Using the primary SFQ pulses to correct the digital output signal allows the converter (10) to take into account the non-linearities of the primary quantizer (30).
申请公布号 US2002063643(A1) 申请公布日期 2002.05.30
申请号 US20000725620 申请日期 2000.11.29
申请人 SMITH ANDREW D.;HERR QUENTIN P.;JOHNSON MARK W.;DALRYMPLE BRUCE J. 发明人 SMITH ANDREW D.;HERR QUENTIN P.;JOHNSON MARK W.;DALRYMPLE BRUCE J.
分类号 H03M1/10;H03M1/06;H03M1/60;H03M13/37;(IPC1-7):H03M1/00 主分类号 H03M1/10
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