发明名称 SEMICONDUCTOR WAFER, SEMICONDUCTOR CHIP, SEMICONDUCTOR DEVICE AND PRODUCING METHOD OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: To provide an electric-featured examination technique which can shorten the time of the prove test after the wafer level barn in, which can prevent the flow of substandard article to the assembling process, and which can easily analyze the cause of outbreak of failure after the delivery to the customer. CONSTITUTION: The MCP loads two semiconductor chips, the flash memory and the SRAM. When the wafer level barn in at the semiconductor chip of flash memory is performed, collectively contact check is operated on the input and output pad of each semiconductor chip. Also, the erase/right mode and read mode is operated toward the memory alley of each semiconductor chip, following the step S201-S211. The record data of results of these tests is wrote on the semiconductor chip of flash memory. At the next prove test process, the record data wrote in the process of wafer level barn-in is read out, and the prove test is continued only about the good semiconductor chip.
申请公布号 KR20020040555(A) 申请公布日期 2002.05.30
申请号 KR20010070637 申请日期 2001.11.14
申请人 AKITA ELECTRONICS CO., LTD.;HITACHI, LTD. 发明人 HARUYAMA KATSUHIRO;HATAZAWA TAKAHIRO;HOMMA KAZUKI;KITAJIMA FUMIAKI;MOTOMATSU HIROYUKI;OKADA TERUTAKA
分类号 G01R31/28;G01R31/3185;G11C11/413;G11C16/02;G11C29/00;G11C29/06;G11C29/56;H01L21/66;H01L21/822;H01L27/04;(IPC1-7):H01L21/66 主分类号 G01R31/28
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