| 摘要 |
PROBLEM TO BE SOLVED: To form a highly-integrated MIS field effect transistor which overcomes the problem where faster speed is not attained for micronization and no MIS field effect transistor of SOI structure provided with higher speed and integration is formed as further integration is not allowed except for micronization of elements. SOLUTION: An SOI type MIS field effect transistor is provided. Here, a fine p-type SOI substrate 3 is pasted to a p-type first silicon substrate 1 through an oxide film 2 where the channel widthwise direction is defined by a first trench 4a for forming an element separation region (field) and the channel lengthwise direction is defined by a second trench 4b for forming the element separation region (field). A gate electrode 10 comprising a barrier metal 9 is provided just above the p-type SOI substrate 3 through a gate oxide film 8. Pin plugs (7a and 7b) are so provided as to partially contact n-type and n+ type source drain regions (5 and 6) provided on two side surfaces in the channel lengthwise direction of the p-type SOI substrate 3. An AlCu wiring 17 is connected to the pin plugs (7a and 7b). A fine plug side-surface connection structure is comprised where the side surfaces of the pin plugs (7a and 7b) of the p-type SOI substrate 3 are separated for insulation by a field oxide film.
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