发明名称 MOS TYPE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To suppress a short channel effect of a threshold voltage. SOLUTION: A channel region 5, a pair of source and drain regions, and a separation insulating film 2 having a trench separation structure are selectively formed on the main surface of a semiconductor substrate 1. The groove of the upper surface of the separation insulating film 2 which adjoins the side surface of the channel region 5 is lower than the upper surface of the channel region 5, while the region other than that is almost level with the upper surface of the channel region 5. Thus, a part of a pair of side surfaces as well as the upper surface of the channel region 5 are covered with a gate electrode 4 with a gate insulating film 3 in between. A channel width W of the channel region 5 is set to twice, or less than, a maximum channel depletion layer width Xdm. The width of a groove adjoining the side surface of the channel region 5 is set to twice, or less than, the thickness of the gate electrode 4.
申请公布号 JP2002151688(A) 申请公布日期 2002.05.24
申请号 JP20010036437 申请日期 2001.02.14
申请人 MITSUBISHI ELECTRIC CORP 发明人 MAEKAWA SHIGETO
分类号 H01L21/76;H01L21/336;H01L21/762;H01L29/423;H01L29/78;H01L29/786;(IPC1-7):H01L29/78 主分类号 H01L21/76
代理机构 代理人
主权项
地址