发明名称 CLAMP CONTROL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce the flicker in a video by reducing the fluctuation of a clamp level after clamp control convergence. SOLUTION: The clamp level of an input video signal s clamped to a clamp control level by a digital control clamp circuit 32, and converted into a digital signal by an A/D converter 12. The clamp level is compared with a clamp set level by an error detector 16, a mean value is calculated by a mean value calculating circuit 34, and components in core ring amounts or less are removed by a core ring processing circuit 36. The processed result is inputted to an integrator 18, and the integrated value is fed back to the clamp circuit 32 as the clamp control level. At that time, even when the detection signal of the error detector 16 is changed only by a value corresponding to 1 control level width (w) of the clamp control level, it is removed by the core ring processing circuit 36, and the processed result is inputted to the integrator 18. Thus, it is possible to prevent the fluctuation of the clamp control level to be fed back to the clamp circuit 32.
申请公布号 JP2002152550(A) 申请公布日期 2002.05.24
申请号 JP20000343521 申请日期 2000.11.10
申请人 FUJITSU GENERAL LTD 发明人 TAKAGI NOBUYUKI;NAKAJIMA MASAMICHI;ONODERA JUNICHI;IKEDA MAKOTO;NISHIMURA EIZO
分类号 H04N5/18;(IPC1-7):H04N5/18 主分类号 H04N5/18
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