| 摘要 |
PROBLEM TO BE SOLVED: To optimize a total inductance to 1 nH or below in the region of a connection line as well as in the region of a semiconductor device configured on an electrically insulated substrate, related to a parasitic inductance of a circuit device. SOLUTION: A first power transistor (13) and a second power transistor (19) are arrayed in a line while adjoining each other with a narrow gap. DC connection conductors adjoin each other, as a band, with a narrow gap at a first part while parallel to each other up to near a substrate surface (9) or contact it. At least one DC connection conductor is parallel to the substrate surface while comprising a second band part disposing a bar (23). These bars are partially separated from the substrate only by an insulating layer, with at least one contact position (12) to the substrate surface comprised. |
