发明名称 |
ALWAYS ENABLED TEST METHOD FOR MONOLITHIC INTEGRATED CIRCUIT DEVICE, AND INTEGRATED CIRCUIT DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To provide an on-chip test interface being integrated and always enabled which is used for verifying a function of high speed incorporated memory such as a synchronous dynamic random access memory(SDRAM) enabling performing a test with an existing tester having comparatively low operation speed (therefore, low cost), or the like. SOLUTION: An interface enables verifying of incorporating memory-macro design using a test interface, the test interface enables that an input signal from a tester of a half rate and a narrow word performs all memory macro- operation over width of a wide memory-macro input/output architecture (I/O) by comprising an on-chip test circuit being separated from a memory-macro. The on-chip test circuit also can comprise a synchronizing circuit for minimizing the skew between an external clock and data outputted from the test chip.
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申请公布号 |
JP2002150796(A) |
申请公布日期 |
2002.05.24 |
申请号 |
JP20010263303 |
申请日期 |
2001.08.31 |
申请人 |
UNITED MEMORIES INC;SONY CORP |
发明人 |
OSCAR FREDERICK JONES JR;PARRIS MICHAEL C |
分类号 |
G01R31/28;G06F11/00;G06F11/25;G06F11/27;G11C7/00;G11C11/401;G11C29/00;G11C29/12;G11C29/48;(IPC1-7):G11C29/00 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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