发明名称 ELECTRODE STRUCTURE, SIGNAL TAKE OUT STRUCTURE AND ELECTRODE FORMING METHOD OF IC CHIP
摘要 PROBLEM TO BE SOLVED: To prevent a conductor for connecting the electrode on an IC chip with the electrode on a substrate from projecting above the circuit pattern plane. SOLUTION: A recess 7 is made from the circuit pattern plane 2 of an IC chip 1 to the side face 6 thereof and an electrode 9 for connection with an electrode 3 on the circuit pattern plane 2 is formed on the bottom face 8 of the recess by plating. When the IC chip 1 is mounted on a substrate 31 while directing the circuit pattern plane 2 in the same direction as the substrate surface 32, the electrode 9 on the bottom face 8 of the recess is connected with the electrode 33 on the substrate 31 by wire bonding 34. Consequently, the protruding part of the bonding wire 34 does not project from the circuit pattern plane 2.
申请公布号 JP2002151546(A) 申请公布日期 2002.05.24
申请号 JP20000339783 申请日期 2000.11.08
申请人 MITSUBISHI HEAVY IND LTD 发明人 KIRIYAMA SATOSHI;DOI TAKAAKI
分类号 H01L23/52;H01L21/3205;H01L21/60;H01L29/06 主分类号 H01L23/52
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