发明名称 METHOD FOR WIRING PLATED LEAD-OUT WIRE
摘要 PROBLEM TO BE SOLVED: To provide a method for wiring a plated lead-out wire which can easily and automatically wire plated lead-out wires led out from respective terminals having a wiring pattern and formed toward a bus line. SOLUTION: This method includes: a step where a terminal area 15 is specified at a position corresponding to the bus line and dummy terminals 16 corresponding to respective via hole parts 12 are virtually arranged in the terminal area 15; a step where plated lead-out wires 17 are formed connecting the via hole parts 12 and dummy terminals 16 corresponding to them in the shortest distances; and a step where the terminal area 15 is moved in parallel to the external shape of a semiconductor package so that the plated lead-out wires 17 cross the external shape of the semiconductor packages not at right angles.
申请公布号 JP2002149734(A) 申请公布日期 2002.05.24
申请号 JP20000338911 申请日期 2000.11.07
申请人 SHINKO ELECTRIC IND CO LTD 发明人 KITAMURA TAMOTSU;ICHIMURA TAKAHIDE
分类号 G06F17/50;H01L23/12;(IPC1-7):G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址