发明名称 METHOD AND SYSTEM FOR MANUFACTURING SEMICONDUCTOR PACKAGE
摘要 PROBLEM TO BE SOLVED: To obtain a method and a system for manufacturing a semiconductor package in which wire bonding and die bonding can be carried out while preventing damage on a semiconductor chip due to application of an undue load. SOLUTION: The method for manufacturing a semiconductor package comprises a process for processing a semiconductor chip combination 1, where one or more semiconductor chip 2b, 2c is combined with another member provided as required, while applying a downward load. That process is carried out while supporting the lower surface of the semiconductor chip combination 1 by pressing a platen 7a including a load detecting means, i.e., a load cell 8, from below and detecting a load being applied to the semiconductor chip combination 1 through the load detecting means. Furthermore, the process is carried out on conditions that the process is interrupted when the load detected by the load detecting means exceeds a specified value.
申请公布号 JP2002151542(A) 申请公布日期 2002.05.24
申请号 JP20000346897 申请日期 2000.11.14
申请人 MITSUBISHI ELECTRIC CORP 发明人 FUJIMOTO HITOSHI
分类号 H01L25/18;H01L21/60;H01L25/065;H01L25/07;(IPC1-7):H01L21/60 主分类号 H01L25/18
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