| 摘要 |
PROBLEM TO BE SOLVED: To provide a microprocessor equipped with an address converting mechanism for executing a dynamic address conversion by page units from a virtual address to a physical address and a low associative address conversion buffer with a large capacity, capable of suppressing the overhead of the address conversion, and preventing any limit to be imposed on the lock function of a TLB entry. SOLUTION: This address converting mechanism is provided with an address conversion buffer having the lock function of an entry and a control logic for controlling the operation of the address conversion buffer. The address conversion buffer is provided with a low order hierarchical buffer arranged as the low order hierarchy of the address conversion buffer, which is not provided with any entry lock function and a high order hieratical buffer arranged as the high order hierarchy of the address conversion buffer, which is provided with higher association than that of the low order hierarchy buffer, and the entry lock function.
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