发明名称 |
METHOD OF FORMING SHALLOW TRENCH ISOLATION IN SILICON |
摘要 |
A method of forming a shallow trench isolation region in a silicon wafer whi ch results in the elimination of long range slip dislocations in the wafer and reduces leakage current across the isolation regions. Long shallow trenches (17) are formed in a silicon wafer (11) at a 45 degree angle to the (111) plane of the wafer. This is achieved by moving the primary flat of the wafer to the (100) plane prior to the formation of the trenches, which causes the bottom edges of the long trenches to intersect with several (111) planes, so that stresses do not propagate along any one single (111) plane. The trenche s (17) are then filled with an insulative material, such as oxide.
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申请公布号 |
CA2427300(A1) |
申请公布日期 |
2002.05.23 |
申请号 |
CA20012427300 |
申请日期 |
2001.09.12 |
申请人 |
ATMEL CORPORATION |
发明人 |
MILLER, ERIC R.;MOON, STEPHEN R. |
分类号 |
H01L21/76;H01L21/762;(IPC1-7):H01L21/762 |
主分类号 |
H01L21/76 |
代理机构 |
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代理人 |
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地址 |
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