发明名称 |
Process for manufacturing a semiconductor wafer, a semiconductor wafer, process for manufacturing a semiconductor integrated circuit device, and semiconductor integrated circuit device |
摘要 |
Over the principal surface of a semiconductor substrate body containing an impurity of a predetermined conduction type, there is formed an epitaxial layer which contains an impurity of the same conduction type as that of the former impurity and the same concentration as the designed one of the former impurity. After this, there are formed a well region which has the same conduction type as that of said impurity and its impurity concentration gradually lowered depthwise of said epitaxial layer The well region is formed with the gate insulating films of MIS.FETs.
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申请公布号 |
US2002061615(A1) |
申请公布日期 |
2002.05.23 |
申请号 |
US20010014405 |
申请日期 |
2001.12.14 |
申请人 |
KAWAGOE HIROTO;SHIRASU TATSUMI;KIYOTA SHOGO;SUZUKI NORIO;YAMADA EIICHI;SUGINO YUJI;KITANO MANABU;SAKURAI YOSHIHIKO;NAGANUMA TAKASHI;ARAKAWA HISASHI |
发明人 |
KAWAGOE HIROTO;SHIRASU TATSUMI;KIYOTA SHOGO;SUZUKI NORIO;YAMADA EIICHI;SUGINO YUJI;KITANO MANABU;SAKURAI YOSHIHIKO;NAGANUMA TAKASHI;ARAKAWA HISASHI |
分类号 |
H01L29/78;H01L21/205;H01L21/8238;H01L27/092;(IPC1-7):H01L21/336;H01L21/823;H01L29/167;H01L29/207;H01L29/227;H01L29/36 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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