发明名称 SYSTEM AND METHOD FOR IMPLEMENTING A MULTI-LEVEL INTERRUPT SCHEME IN A COMPUTER SYSTEM
摘要 A system and method for implementing a multi-level interrupt scheme in a computer system is provided. Bus devices (130) and a bus controller (200) may be coupled to a shared bus (124) in a computer system. The bus may include an interrupt line for each bus device coupled to the bus. A bus device (130) may be configured to convey different types of interrupt signals on its interrupt line depending on an interrupt priority level of a given interrupt. The bus controller (200) may be configured to receive interrupt signals from each bus device coupled to the bus and may arbitrate amongst the interrupt signals based on the interrupt priority level of each interrupt signal. The bus controller (200) may grant the interrupt that corresponds to the highest priority level. If multiple interrupts correspond to the same highest priority level in a group of interrupts, then the bus controller may use any suitable arbitration scheme to grant an interrupt.
申请公布号 WO0241153(A2) 申请公布日期 2002.05.23
申请号 WO2001US24690 申请日期 2001.08.07
申请人 ADVANCED MICRO DEVICES, INC. 发明人 MALECK, TIMOTHY, C.
分类号 G06F13/24;G06F9/48;G06F13/26 主分类号 G06F13/24
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