| 摘要 |
PURPOSE: A transmitter circuit of a universal asynchronous receiver/transmitter(UART) for hardware flow control is provided, which reduces a CPU load and also reduces a current consumption. CONSTITUTION: The transmitter circuit includes a CTS signal generator unit generating a CTS signal in response to a CTS external input signal inputted from a counter part, and a transmission start state signal generator unit(200) generating a transmission start state signal in response to the CTS signal generated from the CTS signal generator unit, a CTS control signal and start state condition signals. The CTS signal generator unit includes a counter(104) down-counting data provided from the external and outputs an enable signal when the count value becomes '0', and a logic circuit(106) outputting a main clock signal as a clock signal in response to the enable signal from the counter, and a latch unit(108) outputting the CTS external input signal by being synchronized to the clock signal from the logic circuit. The logic circuit is constituted with an AND gate, and the latch unit is constituted with D-flip flops.
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